報告題目：Energy-efficient VLSI design for image recognition and machine learning algorithms 面向圖像識別與機器學習的低功耗超大規模集成電路設計
報告摘要：Nowadays, many computer-vision and machine-learning applications in portable devices such as robotics, smartphones, and autonomous vehicles are constrained by their real-time performance requirements. Meanwhile, the power consumption is also a critical factor for battery-powered systems. The VLSI design for image recognition and machine learning must take account of the processing speed and energy-efficiency simultaneously. In particular, embedded SRAM (static random-access memory) macros are important power-dissipation sources in image processing algorithms due to the high-capacitance buses and frequent accesses. To avoid the inductive bounce noise on the power supply and ground caused by large in rush/discharge currents in mode transitions of power-gating approach, in this research, a hardware-friendly algorithm with optimized SRAM utilization is developed to image recognition and machine learning algorithms. The prototype chips with energy-efficient VLSI architecture have been silicon-proved in 28/65/180nm CMOS technology with high integration density and memory-utilization efficiency for demonstrating the applicability in portable devices.
報告人簡曆：FENGWEI AN received the Ph.D. from Hiroshima University, Japan in 2013. He worked with the Graduate School of Engineering, Hiroshima University as an Assistant Professor from 2013 and as an Associate Professor from 2017. From April 2018 to March 2019, he worked with Panasonic Semiconductor Solutions Co., Ltd for DSP design of CIS and Time-of-Flight Cameras. Now, he is an Associate Professor in Southern University of Science and Technology. His research interests include reconfigurable computing, ultra-low power digital circuits, and systems, and embedded system architecture for image recognition and machine learning algorithms.